AOB414 n-channel sdmos tm power transistor general description product summary v ds i d (at v gs =10v) 51a r ds(on) (at v gs =10v) < 25m w r ds(on) (at v gs = 7v) < 31m w 100% uis tested -rohs compliant 100% r g tested symbol v ds drain-source voltage 100 the AOB414/l is fabricated with sdmos tm trench technology that combines excellent r ds(on) with low gate charge.the result is outstanding efficiency with co ntrolled switching behavior. this universal technology is we ll suited for pwm, load switching and general purpose applications.AOB414 and AOB414l are electrically identical. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v g d s to-263 d 2 pak d g s g s top view bottom view v ds v gs i dm i ar e ar t j , t stg symbol t 10s steady-state steady-state r q jc a c/w c/w thermal characteristics c junction and storage temperature range -55 to 175 units maximum junction-to-ambient a c/w r q ja parameter typ repetitive avalanche energy l=0.1mh c w mj 5.3 continuous drain current 39 6.6 max t c =25c t a =25c a 150 1.6 100 pulsed drain current c continuous drain current g 2.5 75 t c =100c w gate-source voltage drain-source voltage 100 11 40 14 v 25 a v i d 51 36 t c =25c t c =100c 28 t a =25c i dsm t a =70c avalanche current c maximum junction-to-case maximum junction-to-ambient a d 0.7 50 1 power dissipation b p d power dissipation a p dsm t a =70c g d s to-263 d 2 pak d g s g s top view bottom view rev1: may 2012 www.aosmd.com page 1 of 7
AOB414 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 10 t j =55c 50 i gss 100 na v gs(th) gate threshold voltage 2 3.3 4 v i d(on) 100 a 20.5 25 t j =125c 36 43 25 31 m w g fs 37 s v sd 0.66 1 v i s 40 a c iss 1400 1770 2200 pf c oss 115 165 214 pf c rss 33 55 80 pf r g 0.3 0.65 1.0 w q g (10v) 14 28 42 nc q gs 4 9 14 nc q gd 6 10 14 nc t d(on) 12 ns t r 4 ns t 17 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =50v, r l =2.5 w , r =3 w gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =50v, i d =20a gate source charge gate drain charge r ds(on) static drain-source on-resistance m w i s =1a,v gs =0v v ds =5v, i d =20a v gs =7v, i d =15a v ds =v gs i d =250 m a v ds =0v, v gs = 25v zero gate voltage drain current gate-body leakage current forward transconductance diode forward voltage reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a t d(off) 17 ns t f 5 ns t rr 20 29 37 ns q rr 25 36 47 nc t rr 12 20 26 ns q rr 60 82 110 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =20a, di/dt=100a/ m s turn-off delaytime r gen =3 w turn-off fall time i f =20a, di/dt=100a/ m s body diode reverse recovery time i f =20a, di/dt=500a/ m s body diode reverse recovery charge i f =20a, di/dt=500a/ m s body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 175 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =175 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175 c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 1: may 2012 www.aosmd.com page 2 of 7
AOB414 typical electrical and thermal characteristics 0 10 20 30 40 50 60 3 4 5 6 7 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 35 40 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =7v i d =15a v gs =10v i d =20a 0 10 20 30 40 50 60 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =6v 8v 10v 6.5v 7v v gs =7v v gs =10v 25 c 125 c v ds =5v 0 10 20 30 40 50 60 3 4 5 6 7 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 35 40 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =7v i d =15a v gs =10v i d =20a 10 20 30 40 50 60 6 7 8 9 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 0 10 20 30 40 50 60 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =6v 8v 10v 6.5v 7v i d =20a 25 c 125 c v gs =7v v gs =10v 25 c 125 c v ds =5v rev 1: may 2012 www.aosmd.com page 3 of 7
AOB414 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 5 10 15 20 25 30 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) c oss c rss v ds =50v i d =20a t j(max) =175 c t a =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10ms 1ms dc r ds(on) t j(max) =175 c t a =25 c 100 m s 10 m s 40 0 2 4 6 8 10 0 5 10 15 20 25 30 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =50v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175 c t a =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10ms 1ms dc r ds(on) t j(max) =175 c t a =25 c 100 m s r q jc =1.0 c/w 10 m s rev 1: may 2012 www.aosmd.com page 4 of 7
AOB414 typical electrical and thermal characteristics 0 10 20 30 40 50 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 30 60 90 120 150 180 0 25 50 75 100 125 150 175 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c t a =150 c t a =100 c t a =125 c 0 10 20 30 40 50 0.01 0.1 1 10 100 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c 0 10 20 30 40 50 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 30 60 90 120 150 180 0 25 50 75 100 125 150 175 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c t a =150 c t a =100 c t a =125 c 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) 0 10 20 30 40 50 0.01 0.1 1 10 100 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =50 c/w in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t a =25 c t on t p d rev 1: may 2012 www.aosmd.com page 5 of 7
AOB414 typical electrical and thermal characteristics -rohs compliant -halogen free 0 3 6 9 12 15 50 100 150 200 250 300 0 5 10 15 20 25 30 i rm (a) q rr (nc) i s (a) figure 17: diode reverse recovery charge and peak current vs. conduction current di/dt=800a/ m s 125oc 125oc 25oc 25oc q rr i rm -2 2 6 10 14 18 22 26 30 0 30 60 90 120 150 0 200 400 600 800 1000 i rm (a) q rr (nc) di/dt (a/ m mm m s) figure 19: diode reverse recovery charge and peak current vs. di/dt 125oc 125oc 25oc 25oc i s =20a q rr i rm 0 0.4 0.8 1.2 1.6 2 0 4 8 12 16 20 24 0 5 10 15 20 25 30 s t rr (ns) i s (a) figure 18: diode reverse recovery time and softness factor vs. conduction current di/dt=800a/ m s 125oc 125oc 25oc 25oc t rr s 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5 10 15 20 25 30 0 200 400 600 800 1000 s t rr (ns) di/dt (a/ m mm m s) figure 20: diode reverse recovery time and softness factor vs. di/dt 125oc 25oc 25oc 125oc i s =20a t rr s 0 3 6 9 12 15 50 100 150 200 250 300 0 5 10 15 20 25 30 i rm (a) q rr (nc) i s (a) figure 17: diode reverse recovery charge and peak current vs. conduction current di/dt=800a/ m s 125oc 125oc 25oc 25oc q rr i rm -2 2 6 10 14 18 22 26 30 0 30 60 90 120 150 0 200 400 600 800 1000 i rm (a) q rr (nc) di/dt (a/ m mm m s) figure 19: diode reverse recovery charge and peak current vs. di/dt 125oc 125oc 25oc 25oc i s =20a q rr i rm 0 0.4 0.8 1.2 1.6 2 0 4 8 12 16 20 24 0 5 10 15 20 25 30 s t rr (ns) i s (a) figure 18: diode reverse recovery time and softness factor vs. conduction current di/dt=800a/ m s 125oc 125oc 25oc 25oc t rr s 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5 10 15 20 25 30 0 200 400 600 800 1000 s t rr (ns) di/dt (a/ m mm m s) figure 20: diode reverse recovery time and softness factor vs. di/dt 125oc 25oc 25oc 125oc i s =20a t rr s rev 1: may 2012 www.aosmd.com page 6 of 7
AOB414 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 1: may 2012 www.aosmd.com page 7 of 7
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